1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly, to a semiconductor device suitably applicable to an integrated circuit for driving a liquid crystal panel.
2. Description of the Related Art
Integrated circuit chips of manufactured semiconductor devices are tested in various ways. One of the tests is a function test that confirms whether an expected signal is available at an output terminal in response to a given signal applied to an input terminal. Generally, in the function test, connections with all pads used on the chip are made in a certain way.
FIG. 7 shows a conventional manner of testing semiconductor devices. Referring to FIG. 7, a plurality of pads 102 are formed around a circuit formation surface of a semiconductor chip 101. The pads 102 are connected to all terminals used as inputs, output and power supply of circuits formed on the semiconductor chip 101.
The function test of the semiconductor chip 101 is carried out in such a manner that probe needles 103 connected to a test device are contacted to all the pads 102 used. That is, input signals that are output from the test device are input to the pads 102 of the given input terminals of the semiconductor chip 101 via the probe needles 103, and the resultant signals that are output to the given output terminals are sent to the test device via the probe needles 103.
The number of pads 102 on the semiconductor chip 101 increases as the integration progresses. For example, a recent integrated circuit for driving a liquid crystal panel has output terminals as many as 384 outputs. Thus, the pitch of the pads 102 is narrowed and the pitch is now as narrow as 50 μm.
Recently, an increased number of terminals are required as the number of pixels increases due to progress to higher precision of the liquid crystal panel. It is estimated that the integrated circuit for driving the liquid crystal panel further progresses from the 384 outputs and has 480 or 512 outputs. The conventional pad pitch needs an increased chip area and raises the production cost. Therefore, there has been considerable activity in narrowing the pad pitch to thus reduce the chip area so that an increased number of outputs are realized at a low cost. The recent assembly technique goes toward a pad pitch as narrows as 45 μm and further 35 μm.
However, a new problem will arise from the narrowing of the pad pitch. More particularly, a difficulty in contacting pads with the probe needles will be encountered. It will become difficult to correctly make contact the pads with the probe needles due to the narrowing of the pad pitch. The adjacent pads may frequently be short-circuited. Further, it may be difficult to make an adjustment for cancellation of the difference in contact pressure among the pads due to the difference in height so as to have a uniform constant contact pressure on each pad because each of the all pads is contacted with the respective probe needle. The factors mentioned above will reduce the yield in mass production.